Please use this identifier to cite or link to this item: http://repo.lib.jfn.ac.lk/ujrr/handle/123456789/480
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dc.contributor.authorAbeyagunawardena, S.K.
dc.contributor.authorSisira Kumara, J.R.S.
dc.contributor.authorEkanayake, J.B.
dc.contributor.authorArulampalam, A.
dc.date.accessioned2014-07-04T09:01:51Z
dc.date.accessioned2022-06-27T10:02:11Z-
dc.date.available2014-07-04T09:01:51Z
dc.date.available2022-06-27T10:02:11Z-
dc.date.issued2013-09
dc.identifier.urihttp://repo.lib.jfn.ac.lk/ujrr/handle/123456789/480-
dc.description.abstractA magnetic core fault current limiter (MFCL) saturated by a dc biasing coil was designed and implemented both experimentally and in PSCAD/EMTDC simulation package. The operation of the device under normal operating conditions and faults was then studied. A case study was carried out using simulation to demonstrate the application of the proposed MFCL. The benefits of using a grid-connected single-phase rectifier to bias the dc coil of the MFCL were investigated through simulation studies. This simulation results show improvements in limiting the fault current and minimizing the voltage sag on healthy busbars during a fault. It was also found that the highest improvements are achieved when the rectifier is connected to the downstream grid.en_US
dc.language.isoenen_US
dc.publisherJournal of the National Science Foundationen_US
dc.titleA Magnetic-core based Fault Current Limiter for Utility Applicationsen_US
dc.typeArticleen_US
Appears in Collections:Electrical & Electronic Engineering

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